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asic-adder
asic-adder PublicJAX backend that compiles StableHLO/MLIR to a custom PJRT stack and executes kernels on Artix-7 FPGA over Ethernet.
Verilog 2
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neuralink-challenge-submission
neuralink-challenge-submission PublicDomain-specific autoencoder for Neuralink compression challenge
C++
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