From 2a0cef3e3676908635290e4ada45e047d0d84ed1 Mon Sep 17 00:00:00 2001 From: "Zachary J. Fields" Date: Tue, 9 Dec 2025 13:38:53 -0600 Subject: [PATCH 1/5] feat: Blues Heron (STM32U575OIY6QTR) --- README.md | 1 + boards.txt | 67 ++- cmake/boards_db.cmake | 85 +++ tools/platformio/boards_remap.json | 1 + .../U575O(G-I)YxQ_U585OIYxQ/CMakeLists.txt | 2 + .../PeripheralPins_HERON.c | 560 ++++++++++++++++++ .../U575O(G-I)YxQ_U585OIYxQ/ldscript.ld | 166 ++++++ .../U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp | 357 +++++++++++ .../U575O(G-I)YxQ_U585OIYxQ/variant_HERON.h | 340 +++++++++++ 9 files changed, 1554 insertions(+), 25 deletions(-) create mode 100644 variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/PeripheralPins_HERON.c create mode 100644 variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/ldscript.ld create mode 100644 variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp create mode 100644 variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.h diff --git a/README.md b/README.md index a488ab4a0d..4263603144 100644 --- a/README.md +++ b/README.md @@ -878,6 +878,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :----: | :-------: | ---- | :-----: | :---- | | :green_heart: | STM32L4R5ZIYx | [Swan R5](https://blues.com/products/swan) | *2.1.0* | | | :green_heart: | STM32L433CC | [Cygnet](https://blues.com/products) | *2.8.0* | | +| :yellow_heart: | STM32U575CITx | [Heron](https://blues.com/products) | **2.13.0** | | ### [Elecgator](https://www.elecgator.com/) boards diff --git a/boards.txt b/boards.txt index 1bbdb6d85f..0a0aa02fed 100644 --- a/boards.txt +++ b/boards.txt @@ -14290,6 +14290,23 @@ Blues.menu.pnum.CYGNET.pid.0=0x0003 Blues.menu.pnum.CYGNET.openocd.target=stm32l4x Blues.menu.pnum.CYGNET.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L433.svd +# Heron board +Blues.menu.pnum.HERON=Heron +Blues.menu.pnum.HERON.upload.maximum_size=2097152 +Blues.menu.pnum.HERON.upload.maximum_data_size=786432 +Blues.menu.pnum.HERON.build.mcu=cortex-m33 +Blues.menu.pnum.HERON.build.fpu=-mfpu=fpv5-sp-d16 +Blues.menu.pnum.HERON.build.float-abi=-mfloat-abi=hard +Blues.menu.pnum.HERON.build.board=HERON +Blues.menu.pnum.HERON.build.series=STM32U5xx +Blues.menu.pnum.HERON.build.product_line=STM32U575xx +Blues.menu.pnum.HERON.build.variant=STM32U5xx/U575O(G-I)YxQ_U585OIYxQ +Blues.menu.pnum.HERON.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS +Blues.menu.pnum.HERON.vid.0=0x30A4 +Blues.menu.pnum.HERON.pid.0=0x0004 +Blues.menu.pnum.HERON.openocd.target=stm32u5x +Blues.menu.pnum.HERON.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32U5xx/STM32U575.svd + # Swan R5 board Blues.menu.pnum.SWAN_R5=Swan R5 Blues.menu.pnum.SWAN_R5.upload.maximum_size=2097152 @@ -14308,40 +14325,40 @@ Blues.menu.pnum.SWAN_R5.openocd.target=stm32l4x Blues.menu.pnum.SWAN_R5.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L4R5.svd # Upload menu +Blues.menu.upload_method.OpenOCDSTLink=OpenOCD STLink (SWD) +Blues.menu.upload_method.OpenOCDSTLink.upload.protocol=stlink +Blues.menu.upload_method.OpenOCDSTLink.upload.tool=openocd_upload + +Blues.menu.upload_method.OpenOCDDapLink=OpenOCD DapLink (SWD) +Blues.menu.upload_method.OpenOCDDapLink.upload.protocol=cmsis-dap +Blues.menu.upload_method.OpenOCDDapLink.upload.tool=openocd_upload +Blues.menu.upload_method.OpenOCDDapLink.debug.server.openocd.scripts.0=interface/cmsis-dap.cfg +Blues.menu.upload_method.OpenOCDDapLink.debug.server.openocd.scripts.1={runtime.platform.path}/debugger/select_swd.cfg + Blues.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD) Blues.menu.upload_method.swdMethod.upload.protocol=swd Blues.menu.upload_method.swdMethod.upload.options=-a {upload.address} -m {upload.mode} -s {upload.start} Blues.menu.upload_method.swdMethod.upload.tool=stm32CubeProg -Blues.menu.upload_method.jlinkMethod=STM32CubeProgrammer (J-Link) -Blues.menu.upload_method.jlinkMethod.upload.protocol=jlink -Blues.menu.upload_method.jlinkMethod.upload.options=-a {upload.address} -s {upload.start} -Blues.menu.upload_method.jlinkMethod.upload.tool=stm32CubeProg +Blues.menu.upload_method.dfuMethod=STM32CubeProgrammer (DFU) +Blues.menu.upload_method.dfuMethod.upload.protocol=dfu +Blues.menu.upload_method.dfuMethod.upload.options=-v {upload.vid} -p {upload.pid} -a {upload.address} -s {upload.start} +Blues.menu.upload_method.dfuMethod.upload.tool=stm32CubeProg Blues.menu.upload_method.serialMethod=STM32CubeProgrammer (Serial) Blues.menu.upload_method.serialMethod.upload.protocol=serial Blues.menu.upload_method.serialMethod.upload.options=-c {serial.port.file} -a {upload.address} -s {upload.start} --parity {upload.parity} Blues.menu.upload_method.serialMethod.upload.tool=stm32CubeProg -Blues.menu.upload_method.dfuMethod=STM32CubeProgrammer (DFU) -Blues.menu.upload_method.dfuMethod.upload.protocol=dfu -Blues.menu.upload_method.dfuMethod.upload.options=-v {upload.vid} -p {upload.pid} -a {upload.address} -s {upload.start} -Blues.menu.upload_method.dfuMethod.upload.tool=stm32CubeProg +Blues.menu.upload_method.jlinkMethod=STM32CubeProgrammer (J-Link) +Blues.menu.upload_method.jlinkMethod.upload.protocol=jlink +Blues.menu.upload_method.jlinkMethod.upload.options=-a {upload.address} -s {upload.start} +Blues.menu.upload_method.jlinkMethod.upload.tool=stm32CubeProg Blues.menu.upload_method.bmpMethod=BMP (Black Magic Probe) Blues.menu.upload_method.bmpMethod.upload.protocol=gdb_bmp Blues.menu.upload_method.bmpMethod.upload.tool=bmp_upload -Blues.menu.upload_method.OpenOCDSTLink=OpenOCD STLink (SWD) -Blues.menu.upload_method.OpenOCDSTLink.upload.protocol=stlink -Blues.menu.upload_method.OpenOCDSTLink.upload.tool=openocd_upload - -Blues.menu.upload_method.OpenOCDDapLink=OpenOCD DapLink (SWD) -Blues.menu.upload_method.OpenOCDDapLink.upload.protocol=cmsis-dap -Blues.menu.upload_method.OpenOCDDapLink.upload.tool=openocd_upload -Blues.menu.upload_method.OpenOCDDapLink.debug.server.openocd.scripts.0=interface/cmsis-dap.cfg -Blues.menu.upload_method.OpenOCDDapLink.debug.server.openocd.scripts.1={runtime.platform.path}/debugger/select_swd.cfg - ################################################################################ # Elecgator boards @@ -16418,9 +16435,13 @@ GenWL.menu.opt.o0std.build.flags.optimize=-O0 3dprinter.menu.opt.o0std=No Optimization (-O0) 3dprinter.menu.opt.o0std.build.flags.optimize=-O0 +Blues.menu.opt.ogstd=Debug (-Og) +Blues.menu.opt.ogstd.build.flags.optimize=-Og Blues.menu.opt.osstd=Smallest (-Os default) Blues.menu.opt.oslto=Smallest (-Os) with LTO Blues.menu.opt.oslto.build.flags.optimize=-Os -flto +Blues.menu.opt.o0std=No Optimization (-O0) +Blues.menu.opt.o0std.build.flags.optimize=-O0 Blues.menu.opt.o1std=Fast (-O1) Blues.menu.opt.o1std.build.flags.optimize=-O1 Blues.menu.opt.o1lto=Fast (-O1) with LTO @@ -16433,10 +16454,6 @@ Blues.menu.opt.o3std=Fastest (-O3) Blues.menu.opt.o3std.build.flags.optimize=-O3 Blues.menu.opt.o3lto=Fastest (-O3) with LTO Blues.menu.opt.o3lto.build.flags.optimize=-O3 -flto -Blues.menu.opt.ogstd=Debug (-Og) -Blues.menu.opt.ogstd.build.flags.optimize=-Og -Blues.menu.opt.o0std=No Optimization (-O0) -Blues.menu.opt.o0std.build.flags.optimize=-O0 Elecgator.menu.opt.osstd=Smallest (-Os default) Elecgator.menu.opt.oslto=Smallest (-Os) with LTO @@ -16875,13 +16892,13 @@ GenWL.menu.dbg.enable_all.build.flags.debug=-g 3dprinter.menu.dbg.enable_all=Core Logs and Symbols Enabled (-g) 3dprinter.menu.dbg.enable_all.build.flags.debug=-g -Blues.menu.dbg.none=None +Blues.menu.dbg.enable_all=Core Logs and Symbols Enabled (-g) +Blues.menu.dbg.enable_all.build.flags.debug=-g Blues.menu.dbg.enable_sym=Symbols Enabled (-g) Blues.menu.dbg.enable_sym.build.flags.debug=-g -DNDEBUG Blues.menu.dbg.enable_log=Core logs Enabled Blues.menu.dbg.enable_log.build.flags.debug= -Blues.menu.dbg.enable_all=Core Logs and Symbols Enabled (-g) -Blues.menu.dbg.enable_all.build.flags.debug=-g +Blues.menu.dbg.none=None Elecgator.menu.dbg.none=None Elecgator.menu.dbg.enable_sym=Symbols Enabled (-g) diff --git a/cmake/boards_db.cmake b/cmake/boards_db.cmake index 7a0eb3ca45..2887ddf4e6 100644 --- a/cmake/boards_db.cmake +++ b/cmake/boards_db.cmake @@ -101406,6 +101406,91 @@ target_compile_options(GENERIC_WLE5JCIX_serial_none INTERFACE "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" ) +# HERON +# ----------------------------------------------------------------------------- + +set(HERON_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ") +set(HERON_MAXSIZE 2097152) +set(HERON_MAXDATASIZE 786432) +set(HERON_MCU cortex-m33) +set(HERON_FPU_CONF "fpv5-sp-d16") +set(HERON_FPU_ABI "hard") +set(HERON_FPCONF "${HERON_FPU_CONF}-${HERON_FPU_ABI}") +set(HERON_PID 0x0004) +add_library(HERON INTERFACE) +target_compile_options(HERON INTERFACE + "SHELL:-DSTM32U575xx" + "SHELL:-DCUSTOM_PERIPHERAL_PINS" + "SHELL:" + "SHELL:-mfpu=${HERON_FPU_CONF} -mfloat-abi=${HERON_FPU_ABI}" + -mcpu=${HERON_MCU} +) +target_compile_definitions(HERON INTERFACE + "STM32U5xx" + "ARDUINO_HERON" + "BOARD_NAME=\"HERON\"" + "BOARD_ID=HERON" + "VARIANT_H=\"variant_HERON.h\"" +) +target_include_directories(HERON INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32U5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32U5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32U5xx/Source/Templates/gcc/ + ${HERON_VARIANT_PATH} +) + +target_link_options(HERON INTERFACE + "LINKER:--default-script=${HERON_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=${HERON_MAXSIZE}" + "LINKER:--defsym=LD_MAX_DATA_SIZE=${HERON_MAXDATASIZE}" + "SHELL:-mfpu=${HERON_FPU_CONF} -mfloat-abi=${HERON_FPU_ABI}" + -mcpu=${HERON_MCU} +) + +add_library(HERON_serial_disabled INTERFACE) +target_compile_options(HERON_serial_disabled INTERFACE + "SHELL:" +) +add_library(HERON_serial_generic INTERFACE) +target_compile_options(HERON_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(HERON_serial_none INTERFACE) +target_compile_options(HERON_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(HERON_usb_CDC INTERFACE) +target_compile_options(HERON_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x30A4 -DUSBD_PID=${HERON_PID} -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(HERON_usb_CDCgen INTERFACE) +target_compile_options(HERON_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x30A4 -DUSBD_PID=${HERON_PID} -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(HERON_usb_HID INTERFACE) +target_compile_options(HERON_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x30A4 -DUSBD_PID=${HERON_PID} -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(HERON_usb_none INTERFACE) +target_compile_options(HERON_usb_none INTERFACE + "SHELL:" +) +add_library(HERON_xusb_FS INTERFACE) +target_compile_options(HERON_xusb_FS INTERFACE + "SHELL:" +) +add_library(HERON_xusb_HS INTERFACE) +target_compile_options(HERON_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(HERON_xusb_HSFS INTERFACE) +target_compile_options(HERON_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # HY_TINYSTM103TB # ----------------------------------------------------------------------------- diff --git a/tools/platformio/boards_remap.json b/tools/platformio/boards_remap.json index c3a8aa22b8..02b71b7545 100644 --- a/tools/platformio/boards_remap.json +++ b/tools/platformio/boards_remap.json @@ -33,6 +33,7 @@ "bw_swan_r5": "SWAN_R5", "blues_swan_r5": "SWAN_R5", "blues_cygnet": "CYGNET", + "blues_heron": "HERON", "disco_b_g431b_esc1": "B_G431B_ESC1", "disco_b_u585i_iot02a": "B_U585I_IOT02A", "nucleo_wl55jc": "NUCLEO_WL55JC1" diff --git a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/CMakeLists.txt b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/CMakeLists.txt index 2a4d55b6b1..51219d34c6 100644 --- a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/CMakeLists.txt +++ b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/CMakeLists.txt @@ -21,7 +21,9 @@ target_link_libraries(variant INTERFACE variant_usage) add_library(variant_bin STATIC EXCLUDE_FROM_ALL generic_clock.c PeripheralPins.c + PeripheralPins_HERON.c variant_generic.cpp + variant_HERON.cpp ) target_link_libraries(variant_bin PUBLIC variant_usage) diff --git a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/PeripheralPins_HERON.c b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/PeripheralPins_HERON.c new file mode 100644 index 0000000000..3c0008f834 --- /dev/null +++ b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/PeripheralPins_HERON.c @@ -0,0 +1,560 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Manually generated by Blues with knowledge of the HERON schematic + */ +#if defined(ARDUINO_HERON) +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT1, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 5, 0)}, // ADC1_IN5 - A0/D0 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 6, 0)}, // ADC1_IN6 - A1/D1 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 7, 0)}, // ADC1_IN7 - A2/D2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 8, 0)}, // ADC1_IN8 - A3/D3 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 9, 0)}, // ADC1_IN9 - A8/BATTERY_VOLTAGE (STAT) + {PA_4_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 9, 0)}, // ADC4_IN9 - A8/BATTERY_VOLTAGE (STAT) + // {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 10, 0)}, // ADC1_IN10 - USART3_VCP_RX + // {PA_5_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 10, 0)}, // ADC4_IN10 - USART3_VCP_RX + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 11, 0)}, // ADC1_IN11 - A6/MI + {PA_6_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 11, 0)}, // ADC4_IN11 - A6/MI + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 12, 0)}, // ADC1_IN12 - A5 + {PA_7_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 20, 0)}, // ADC4_IN20 - A5 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 15, 0)}, // ADC1_IN15 - A7/D11 + {PB_0_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 18, 0)}, // ADC4_IN18 - A7/D11 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 16, 0)}, // ADC1_IN16 - A4/D4 + {PB_1_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 19, 0)}, // ADC4_IN19 - A4/D4 + {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 17, 0)}, // ADC1_IN17 - USB_DETECT + // {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 1, 0)}, // ADC1_IN1 + // {PC_0_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 1, 0)}, // ADC4_IN1 + // {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 2, 0)}, // ADC1_IN2 + // {PC_1_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 2, 0)}, // ADC4_IN2 + // {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 3, 0)}, // ADC1_IN3 + // {PC_2_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 3, 0)}, // ADC4_IN3 + // {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 4, 0)}, // ADC1_IN4 + // {PC_3_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 4, 0)}, // ADC4_IN4 + // {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 14, 0)}, // ADC1_IN14 + // {PC_5_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 23, 0)}, // ADC4_IN23 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +WEAK const PinMap PinMap_DAC[] = { + // {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 1, 0)}, // DAC1_OUT1 - A8/BATTERY_VOLTAGE (STAT) + // {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 2, 0)}, // DAC1_OUT2 - USART3_VCP_RX + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PB_3, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF4_I2C1)}, // CK + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF4_I2C3)}, // D13 + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF4_I2C1)}, // SDA + {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF5_I2C4)}, // SDA + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF4_I2C1)}, // D6 + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF4_I2C2)}, // D9 + // {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF4_I2C3)}, + // {PG_13, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF4_I2C3)}, // A5 + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF4_I2C1)}, // SCL + {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF5_I2C4)}, // SCL + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF4_I2C1)}, // D5 + // {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF4_I2C2)}, // USART3_VCP_TX + // {PB_10_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF3_I2C4)}, // USART3_VCP_TX + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF4_I2C2)}, // D10 + // {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF4_I2C3)}, + // {PG_14, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_NO, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** No I3C *** + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - A0/D0 + {PA_0_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 - A0/D0 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 - A1/D1 + {PA_1_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 - A1/D1 + {PA_1_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N - A1/D1 + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 - A2/D2 + {PA_2_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 - A2/D2 + {PA_2_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 - A2/D2 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 - A3/D3 + {PA_3_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 - A3/D3 + {PA_3_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 - A3/D3 + // {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - USART3_VCP_RX + // {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N - USART3_VCP_RX + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - A6/MI + {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 - A6/MI + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N - A5 + {PA_7_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - A5 + {PA_7_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N - A5 + {PA_7_ALT3, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 - A5 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 - LED_BUILTIN + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 - TX + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 - RX + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 - USB_D_N + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - CHARGE_DETECT + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N - A7/D11 + {PB_0_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 - A7/D11 + {PB_0_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N - A7/D11 + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N - A4/D4 + {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 - A4/D4 + {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N - A4/D4 + {PB_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 4, 1)}, // TIM8_CH4N - USB_DETECT + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 - CK + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - D13 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - MO + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 - SCL + {PB_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N - SCL + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 - SDA + {PB_7_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM17, 1, 1)}, // TIM17_CH1N - SDA + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 - D5 + {PB_8_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 - D5 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 - D6 + {PB_9_ALT1, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM17, 1, 0)}, // TIM17_CH1 - D6 + // {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 - USART3_VCP_TX + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N - D10 + {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N - D10 + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N - D9 + {PB_14_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N - D9 + {PB_14_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 - D9 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N - D12 + {PB_15_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N - D12 + {PB_15_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 - D12 + // {PC_5, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 4, 1)}, // TIM1_CH4N + // {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + // {PC_6_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + // {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + // {PC_7_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + // {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + // {PC_8_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + // {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + // {PC_9_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + // {PD_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 4, 1)}, // TIM8_CH4N + // {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + // {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + // {PE_3, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + // {PE_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + // {PE_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + // {PE_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + // {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + // {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + // {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + // {PG_9, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + // {PG_10, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + // {PG_11, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // A0/D0 + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // A2/D2 + {PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, // A2/D2 + {PA_7, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // A5 + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // TX + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // SCL + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // USART3_VCP_TX + // {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, + // {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, + // {PC_10_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, + // {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART5)}, + // {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, + // {PG_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // A1/D1 + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // A3/D3 + {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, // A3/D3 + {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // USART3_VCP_RX + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // RX + // {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_USART2)}, // CHARGE_DETECT + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // SDA + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // USART3_VCP_TX + // {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, + // {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, + // {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, + // {PC_11_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, + // {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART5)}, + // {PG_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, // A1/D1 + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // USB_D_P + // {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // CHARGE_DETECT + // {PA_15_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // CHARGE_DETECT + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // A4/D4 + {PB_1_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // A4/D4 + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // CK + {PB_4, UART5, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART5)}, // D13 + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // D9 + // {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, + // {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, + // {PG_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, // A0/D0 + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // A6/MI + {PA_6_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // A6/MI + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // USB_D_N + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // D13 + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART5)}, // MO + {PB_7, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // SDA + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // D10 + {PB_13_ALT1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // D10 + // {PG_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // A5 + // {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // USB_D_P + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // MO + {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // MO + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // D12 + // {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_SPI2)}, + // {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, + // {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, + // {PD_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, + // {PG_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // A6/MI + // {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // USB_D_N + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // D13 + {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // D13 + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // D9 + // {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, + // {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, + // {PG_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // A1/D1 + // {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // USART3_VCP_RX + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_SPI2)}, // TX + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // CK + {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // CK + // {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // USART3_VCP_TX + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // D10 + // {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, + // {PD_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, + // {PG_9, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + // {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // A8/BATTERY_VOLTAGE (STAT) + // {PA_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // A8/BATTERY_VOLTAGE (STAT) + // {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // CHARGE_DETECT + // {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // CHARGE_DETECT + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // A7/D11 + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, // D6 + // {PD_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI2)}, + // {PG_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +//*** FDCAN *** + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_RD[] = { + // {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_FDCAN1)}, // USB_D_N + {PB_8, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_FDCAN1)}, // D5 + // {PD_0, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_FDCAN_MODULE_ENABLED +WEAK const PinMap PinMap_CAN_TD[] = { + // {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_FDCAN1)}, // USB_D_P + {PB_9, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_FDCAN1)}, // D6 + // {PD_1, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +//*** No ETHERNET *** + +//*** OCTOSPI *** + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA0[] = { + {PB_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO0 - A4/D4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA1[] = { + {PB_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO1 - A7/D11 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA2[] = { + {PA_7, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO2 - A5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA3[] = { + {PA_6, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO3 - A6/MI + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA4[] = { + // {PC_1, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO4 + // {PD_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO4 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA5[] = { + // {PC_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO5 + // {PD_5, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO5 + // {PG_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_OCTOSPI1)}, // OCTOSPIM_P1_IO5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA6[] = { + // {PC_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_IO6 + // {PG_9, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPI2)}, // OCTOSPIM_P2_IO6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_DATA7[] = { + // {PC_0, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_OCTOSPI1)}, // OCTOSPIM_P1_IO7 + // {PG_10, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPI2)}, // OCTOSPIM_P2_IO7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SCLK[] = { + {PA_3, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_CLK - A3/D3 + // {PB_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_CLK - USART3_VCP_TX + // {PE_10, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_CLK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_OSPI_MODULE_ENABLED +WEAK const PinMap PinMap_OCTOSPI_SSEL[] = { + {PA_0, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPI2)}, // OCTOSPIM_P2_NCS - A0/D0 + {PA_2, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_OCTOSPI1)}, // OCTOSPIM_P1_NCS - A2/D2 + // {PA_4, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_OCTOSPI1)}, // OCTOSPIM_P1_NCS - A8/BATTERY_VOLTAGE (STAT) + // {PA_12, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_OCTOSPI2)}, // OCTOSPIM_P2_NCS - USB_D_P + // {PC_11, OCTOSPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPI1)}, // OCTOSPIM_P1_NCS + // {PG_12, OCTOSPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_OCTOSPI2)}, // OCTOSPIM_P2_NCS + {NC, NP, 0} +}; +#endif + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB_OTG_FS[] = { + // {PA_8, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_USB)}, // USB_OTG_FS_SOF - LED_BUILTIN + // {PA_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, LL_GPIO_PULL_NO, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS - TX + // {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, LL_GPIO_PULL_UP, GPIO_AF10_USB)}, // USB_OTG_FS_ID - RX + {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_USB)}, // USB_OTG_FS_DM - USB_D_N + {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_USB)}, // USB_OTG_FS_DP - USB_D_P + // {PA_13, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_USB)}, // USB_OTG_FS_NOE - SWDIO + // {PA_14, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_USB)}, // USB_OTG_FS_SOF - SWCLK + // {PC_9, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF10_USB)}, // USB_OTG_FS_NOE + {NC, NP, 0} +}; +#endif + +//*** SD *** + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CMD[] = { + {PA_0, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF12_SDMMC2)}, // SDMMC2_CMD - A0/D0 + // {PD_2, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF12_SDMMC1)}, // SDMMC1_CMD + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CK[] = { + // {PC_1, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF12_SDMMC2)}, // SDMMC2_CK + // {PC_12, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF12_SDMMC1)}, // SDMMC1_CK + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA0[] = { + {PB_14, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC2)}, // SDMMC2_D0 - D9 + // {PC_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D0 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA1[] = { + {PB_15, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC2)}, // SDMMC2_D1 - D12 + // {PC_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D1 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA2[] = { + {PB_3, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC2)}, // SDMMC2_D2 - CK + // {PC_10, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D2 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA3[] = { + {PB_4, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC2)}, // SDMMC2_D3 - D13 + // {PC_11, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D3 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA4[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D4 - D5 + {PB_8_ALT1, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF11_SDMMC2)}, // SDMMC2_D4 - D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA5[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 - D6 + {PB_9_ALT1, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF11_SDMMC2)}, // SDMMC2_D5 - D6 + // {PC_0, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA6[] = { + // {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D6 + // {PC_6_ALT1, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF11_SDMMC2)}, // SDMMC2_D6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_DATA7[] = { + // {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF12_SDMMC1)}, // SDMMC1_D7 + // {PC_7_ALT1, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF11_SDMMC2)}, // SDMMC2_D7 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CKIN[] = { + {PB_8, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF8_SDMMC1)}, // SDMMC1_CKIN - D5 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_CDIR[] = { + {PB_9, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF8_SDMMC1)}, // SDMMC1_CDIR - D6 + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D0DIR[] = { + // {PC_6, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF8_SDMMC1)}, // SDMMC1_D0DIR + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SD_MODULE_ENABLED +WEAK const PinMap PinMap_SD_D123DIR[] = { + // {PC_7, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_NO, GPIO_AF8_SDMMC1)}, // SDMMC1_D123DIR + {NC, NP, 0} +}; +#endif + +#endif /* ARDUINO_HERON */ diff --git a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/ldscript.ld b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/ldscript.ld new file mode 100644 index 0000000000..c29d811f16 --- /dev/null +++ b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/ldscript.ld @@ -0,0 +1,166 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Author : STM32CubeIDE +** +** Abstract : Linker script for STM32U575xI Device from STM32U5 series +** +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +** Copyright (c) 2023 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + SRAM4 (xrw) : ORIGIN = 0x28000000, LENGTH = 16K + FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + KEEP(*(.isr_vector)) /* Startup code */ + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + } >FLASH + + .ARM.extab (READONLY) : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } >FLASH + + .ARM (READONLY) : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array (READONLY) : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + + .init_array (READONLY) : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + + .fini_array (READONLY) : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp new file mode 100644 index 0000000000..3ad9e35058 --- /dev/null +++ b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp @@ -0,0 +1,357 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_HERON) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, // 0 - A0/D0 + PA_1, // 1 - A1/D1 + PA_2, // 2 - A2/D2 + PA_3, // 3 - A3/D3 + PB_1, // 4 - A4/D4 + PB_8, // 5 - D5 + PB_9, // 6 - D6 + PA_8, // 7 - LED_BUILTIN + PC_13, // 8 - USER_BTN + PB_14, // 9 - D9 + PB_13, // 10 - D10 + PB_0, // 11 - A7/D11 + PB_15, // 12 - D12 + PB_4, // 13 - D13 + PA_7, // 14 - A5 + PB_3, // 15 - CK + PB_5, // 16 - MO + PA_6, // 17 - A6/MI + PA_10, // 18 - RX + PA_9, // 19 - TX + PH_3, // 20 - B + PB_6, // 21 - SCL + PB_7, // 22 - SDA + PA_13, // 23 - SWDIO + PA_14, // 24 - SWCLK + PA_5, // 25 - USART3_VCP_RX + PB_10, // 26 - USART3_VCP_TX + PH_0, // 27 - ENABLE_3V3 + PH_1, // 28 - DISCHARGE_3V3 + PA_15, // 29 - CHARGE_DETECT + PA_4, // 30 - A8/BATTERY_VOLTAGE (STAT) + PB_2, // 31 - USB_DETECT + PA_11, // 32 - USB_D_N + PA_12, // 33 - USB_D_P + PC_14, // 34 - OSC32_IN (LSE) + PC_15, // 35 - OSC32_OUT (LSE) + PC_0, // 36 - D30/A11 + PC_1, // 37 - D31/A12 + PC_2, // 38 - D32/A13 + PC_3, // 39 - D33/A14 + PC_5, // 40 - D34/A15 + PC_6, // 41 - D35 + PC_7, // 42 - D36 + PC_8, // 43 - D37 + PC_9, // 44 - D38 + PC_10, // 45 - D39 + PC_11, // 46 - D40 + PC_12, // 47 - D41 + PD_0, // 48 - D45 + PD_1, // 49 - D46 + PD_2, // 50 - D47 + PD_4, // 51 - D48 + PD_5, // 52 - D49 + PD_14, // 53 - D50 + PD_15, // 54 - D51 + PE_3, // 55 - D52 + PE_4, // 56 - D53 + PE_5, // 57 - D54 + PE_6, // 58 - D55 + PE_7, // 59 - D56 + PE_8, // 60 - D57 + PE_9, // 61 - D58 + PE_10, // 62 - D59 + PG_9, // 63 - D60 + PG_10, // 64 - D61 + PG_11, // 65 - D62 + PG_12, // 66 - D63 + PG_13, // 67 - D64 + PG_14 // 68 - D65 +}; + +// Analog (Ax) to digital pin number array +const uint32_t analogInputPin[] = { + 0, // PA0, A0 + 1, // PA1, A1 + 2, // PA2, A2 + 3, // PA3, A3 + 4, // PB1, A4 + 14, // PA7, A5 + 17, // PA6, A6/MI + 11, // PB0, A7/D11 + 30 // PA4, A8/BATTERY_VOLTAGE (STAT) + // 25, // PA5, USART3_VCP_RX + // 31, // PB2, USB_DETECT + // 36, // PC0, A11 + // 37, // PC1, A12 + // 38, // PC2, A13 + // 39, // PC3, A14 + // 40 // PC5, A15 +}; + +// ---------------------------------------------------------------------------- + +#ifdef __cplusplus +extern "C" { +#endif + +WEAK void initVariant(void) +{ + /* All pins set to high-Z (floating) initially */ + /* DS13737 Rev 10, Section 3.9.4 - Reset Mode: */ + /* In order to improve the consumption under reset, the I/Os state under + * and after reset is "analog state" (the I/O schmitt trigger is disabled). + * In addition, the internal reset pull-up is deactivated when the reset + * source is internal. + */ + + /* Configure the USB charge detection; leaks ~80uA if not configured. */ + { + __HAL_RCC_GPIOA_CLK_ENABLE(); + GPIO_InitTypeDef GPIO_InitStruct = {}; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_LOW; + /* PA15 is CHARGE_DETECT */ + GPIO_InitStruct.Pin = GPIO_PIN_15; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + } + + /* Configure D13 manually, to avoid stray current on D13 */ + { + __HAL_RCC_GPIOB_CLK_ENABLE(); + GPIO_InitTypeDef GPIO_InitStruct = {}; + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_LOW; + /* PB4 is D13 */ + GPIO_InitStruct.Pin = GPIO_PIN_4; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + } + + /* Configure the 3V3 regulator */ + { + __HAL_RCC_GPIOH_CLK_ENABLE(); + GPIO_InitTypeDef GPIO_InitStruct = {}; + GPIO_InitStruct.Speed = GPIO_SPEED_LOW; + + /* PH0 is ENABLE_3V3 */ + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pin = GPIO_PIN_0; + HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); + + /* PH1 is DISCHARGE_3V3 */ + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; + GPIO_InitStruct.Pin = GPIO_PIN_1; + HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); + + /* Enable 3V3 regulator and disable discharging */ + HAL_GPIO_WritePin(GPIOH, (GPIO_PIN_0 | GPIO_PIN_1), GPIO_PIN_SET); + } +} + +/** + * @brief System Clock Configuration - PLL-based STM32U575 with native USB FS + * + * Key features: + * - SYSCLK = 80 MHz from MSI (4 MHz, Range 4) via PLL1 (4MHz x 40 / R=2) + * - USB FS (48 MHz) sourced from HSI48 via the dedicated ICLK domain + * - LSE enabled with medium-low drive for RTC and MSI auto-calibration (MSIPLLEN) + * - Voltage Scale 1 required for 80 MHz operation + * - EPOD booster required for SYSCLK > 55 MHz at VOS1; enabled + * automatically inside HAL_PWREx_ControlVoltageScaling(SCALE1) + * - FLASH_LATENCY_2 required for 64 < HCLK <= 96 MHz at VOS1 + * - CRS enabled; auto-trim HSI48 from USB SOF packets (+/-250 ppm) + * - Wake-up clock after STOP: MSI (PLL must be re-locked manually after wake) + * + * U5 vs L4 gotcha: + * The STM32U5 MSI range table is INVERSE of STM32L4. On U5, + * RCC_MSIRANGE_0 = 48 MHz (fastest) and RCC_MSIRANGE_15 = 100 kHz (slowest). + * RCC_MSIRANGE_4 = 4 MHz. See stm32u5xx_hal_rcc.h. + * + * References: + * - RM0456 Rev 7 (STM32U57x/U58x) - Ch. 11 (RCC), Ch. 12 (CRS), Ch. 72 (USB OTG_FS) + * - AN2867 Rev 11 - "Oscillator design guide for STM8AF/AL/S, STM32 MCUs and MPUs" + */ +WEAK void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; + RCC_CRSInitTypeDef CRS_InitStruct = {}; + + /** Enable PWR peripheral clock + * + * RM0456: PWREN (RCC_AHB3ENR bit 2) resets to 0, so this call is required + * before accessing any PWR register (e.g., HAL_PWREx_ControlVoltageScaling + * below). + * CubeMX generates this unconditionally for all STM32U5 projects. + */ + __HAL_RCC_PWR_CLK_ENABLE(); + + /** Select SMPS as the Vcore regulator + * + * The STM32U575OIY6QTR (Q-suffix) exposes the dedicated SMPS pinout, and + * the Heron V3 board populates the required external components + * (L3 = 2.2 uH on VLXSMPS, C39/C40 = 2.2 uF on VDD_CORE, VDDSMPS/VDD11 + * tied to VDD_CORE). Switching the Vcore supply from the default LDO to + * the SMPS regulator reduces Run-mode current draw at 80 MHz; STOP2 floor + * is unaffected (both regulators converge to the same low-power path). + * Configure supply before voltage scaling so the VOS1 ramp and the + * subsequent 80 MHz clock ramp both run on the SMPS. + */ + if (HAL_PWREx_ConfigSupply(PWR_SMPS_SUPPLY) != HAL_OK) { + Error_Handler(); + } + + /* Voltage scaling - Scale 1 required for SYSCLK = 48 MHz + * RM0456: VOS2..VOS4 cap HCLK below 48 MHz + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) { + Error_Handler(); + } + + /** Configure LSE Drive Capability + * + * Use MEDIUMLOW (not LOW): RCC_LSEDRIVE_LOW risks marginal LSE startup + * on units near the crystal ESR tolerance limit and degrades MSI PLL mode + * (MSIPLLEN) lock quality. ST recommends MEDIUMLOW as the minimum when + * MSIPLLEN is in use. + * + * Backup domain access must be enabled before configuring LSE or selecting + * the RTC clock source, as those registers (RCC->BDCR) are write-protected + * after reset and silently ignore writes until the lock is cleared. + */ + HAL_PWR_EnableBkUpAccess(); + __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_MEDIUMLOW); + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + * + * Oscillator configuration summary: + * - MSI: MSIRANGE_4 (4 MHz) -- used as PLL1 input + * - PLL1: ON (MSI 4 MHz x PLLN=40 / PLLR=2 = 80 MHz) + * - HSI48: ON -- feeds the USB ICLK domain + * - LSE: ON -- RTC timing and MSI auto-calibration + * - FLASH_LATENCY: 2 (required for 64 < HCLK <= 96 MHz at VOS1) + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 + | RCC_OSCILLATORTYPE_LSE + | RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.LSEState = RCC_LSE_ON; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_4; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; + RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV1; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 40; + RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLQ = 2; + RCC_OscInitStruct.PLL.PLLR = 2; /* 4 MHz x 40 / 2 = 80 MHz */ + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_0; /* 4-8 MHz VCI range */ + RCC_OscInitStruct.PLL.PLLFRACN = 0; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + * + * SYSCLK = PLLCLK (80 MHz), all bus prescalers = /1. FLASH_LATENCY_2 is + * required for 64 < HCLK <= 96 MHz at VOS1. + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 + | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3 + | RCC_CLOCKTYPE_SYSCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the Peripheral clocks + * + * USB clock: HSI48 routed through the U5 ICLK domain + * (RCC_PERIPHCLK_CLK48 + RCC_ICLK_CLKSOURCE_HSI48). HSI48 is trimmed + * against USB SOF packets by the CRS block below; required for reliable + * enumeration across temperature and cable-length variation. + * ADC/DAC and LPUART1 kernel clocks follow SYSCLK for simplicity. + */ + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC + | RCC_PERIPHCLK_CLK48 + | RCC_PERIPHCLK_LPUART1; + PeriphClkInit.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_SYSCLK; + PeriphClkInit.IclkClockSelection = RCC_ICLK_CLKSOURCE_HSI48; + PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_SYSCLK; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { + Error_Handler(); + } + + /** Enable MSI Auto calibration (MSIPLLEN, RCC_CR[2]) + * + * RM0456 Ch. 11 (RCC): setting MSIPLLEN causes the MSI hardware to + * automatically trim itself against LSE as a phase reference, reducing + * MSI frequency error to < +/-0.25%. LSE must already be stable + * (LSERDY=1) before the bit is set -- guaranteed here because + * HAL_RCC_OscConfig() waited for LSERDY before returning. + * + * Setting MSIPLLEN causes MSIRDY to deassert transiently while MSI + * re-synchronises to LSE. HAL_RCCEx_EnableMSIPLLMode() is a single + * SET_BIT; it returns immediately and does not poll MSIRDY under a + * HAL_GetTick() timeout, so the transient cannot stall any HAL routine + * here. + */ + HAL_RCCEx_EnableMSIPLLMode(); + + /** Ensure that MSI is wake-up system clock + * + * After STOP mode, the PLL is not automatically re-enabled. MSI is used + * as the initial wake-up clock; firmware must re-lock the PLL manually + * if 80 MHz is required after wake. This is the same behaviour as the + * Cygnet and Swan PLL-based designs on STM32L4. + */ + __HAL_RCC_WAKEUPSTOP_CLK_CONFIG(RCC_STOP_WAKEUPCLOCK_MSI); + + /** Clock Recovery System -- auto-trim HSI48 from USB SOF packets + * + * Required for reliable USB enumeration across temperature and + * cable-length variation. HSI48 alone is +/-1% untrimmed; CRS pulls + * it to within +/-250 ppm, satisfying USB 2.0 FS. + * RM0456 Ch. 12 (CRS). + */ + __HAL_RCC_CRS_CLK_ENABLE(); + CRS_InitStruct.Prescaler = RCC_CRS_SYNC_DIV1; + CRS_InitStruct.Source = RCC_CRS_SYNC_SOURCE_USB; + CRS_InitStruct.ReloadValue = RCC_CRS_RELOADVALUE_DEFAULT; + CRS_InitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT; + CRS_InitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT; + HAL_RCCEx_CRSConfig(&CRS_InitStruct); +} + +#ifdef __cplusplus +} +#endif + +#endif /* ARDUINO_HERON */ diff --git a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.h b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.h new file mode 100644 index 0000000000..27567103b8 --- /dev/null +++ b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.h @@ -0,0 +1,340 @@ +/* + ******************************************************************************* + * Copyright (c) 2020-2026, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *---------------------------------------------------------------------------- + * The pin number definitions below are used to provide a named index + * into the digitalPin array defined in variant_CYGNET.cpp. The analog + * pins (i.e. PIN_A*) are defined as offset from PNUM_ANALOG_BASE, which + * is defined in pin_arduino_analog.h. The index of the analog pin in the + * digitalPin array can be retrieved from the analogInputPin array by + * masking the pin number against PNUM_ANALOG_BASE (resulting in the + * bottom 6 bits) and using that value as an index into the analog array. + *----------------------------------------------------------------------------*/ +#define PA0 PIN_A0 // A0/D0 +#define PA1 PIN_A1 // A1/D1 +#define PA2 PIN_A2 // A2/D2 +#define PA3 PIN_A3 // A3/D3 +#define PA4 PIN_A8 // A8/BATTERY_VOLTAGE (STAT) +#define PA5 25 // USART3_VCP_RX +#define PA6 PIN_A6 // A6/MI +#define PA7 PIN_A5 // A5 +#define PA8 7 // LED_BUILTIN +#define PA9 19 // TX +#define PA10 18 // RX +#define PA11 32 // USB_D_N +#define PA12 33 // USB_D_P +#define PA13 23 // SWDIO +#define PA14 24 // SWCLK +#define PA15 29 // CHARGE_DETECT +#define PB0 PIN_A7 // A7/D11 +#define PB1 PIN_A4 // A4/D4 +#define PB2 31 // USB_DETECT +#define PB3 15 // CK +#define PB4 13 // D13 +#define PB5 16 // MO +#define PB6 21 // SCL +#define PB7 22 // SDA +#define PB8 5 // D5 +#define PB9 6 // D6 +#define PB10 26 // USART3_VCP_TX +#define PB13 10 // D10 +#define PB14 9 // D9 +#define PB15 12 // D12 +// #define PC0 PIN_A11 +// #define PC1 PIN_A12 +// #define PC2 PIN_A13 +// #define PC3 PIN_A14 +// #define PC5 PIN_A15 +// #define PC6 35 +// #define PC7 36 +// #define PC8 37 +// #define PC9 38 +// #define PC10 39 +// #define PC11 40 +// #define PC12 41 +#define PC13 8 // USER_BTN +#define PC14 34 // OSC32_IN (LSE) +#define PC15 35 // OSC32_OUT (LSE) +// #define PD0 45 +// #define PD1 46 +// #define PD2 47 +// #define PD4 48 +// #define PD5 49 +// #define PD14 50 +// #define PD15 51 +// #define PE3 52 +// #define PE4 53 +// #define PE5 54 +// #define PE6 55 +// #define PE7 56 +// #define PE8 57 +// #define PE9 58 +// #define PE10 59 +// #define PG9 60 +// #define PG10 61 +// #define PG11 62 +// #define PG12 63 +// #define PG13 64 +// #define PG14 65 +#define PH0 27 // ENABLE_3V3 +#define PH1 28 // DISCHARGE_3V3 +#define PH3 20 // B + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA2_ALT2 (PA2 | ALT2) +#define PA3_ALT1 (PA3 | ALT1) +#define PA3_ALT2 (PA3 | ALT2) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PB10_ALT1 (PB10 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +// #define PC0_ALT1 (PC0 | ALT1) +// #define PC1_ALT1 (PC1 | ALT1) +// #define PC2_ALT1 (PC2 | ALT1) +// #define PC3_ALT1 (PC3 | ALT1) +// #define PC5_ALT1 (PC5 | ALT1) +// #define PC6_ALT1 (PC6 | ALT1) +// #define PC7_ALT1 (PC7 | ALT1) +// #define PC8_ALT1 (PC8 | ALT1) +// #define PC9_ALT1 (PC9 | ALT1) +// #define PC10_ALT1 (PC10 | ALT1) +// #define PC11_ALT1 (PC11 | ALT1) + +#define NUM_DIGITAL_PINS 69 +#define NUM_ANALOG_INPUTS 9 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PA8 +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PC13 +#endif + +// Power switch ENABLE and DISCHARGE pins +#ifndef ENABLE_3V3 + #define ENABLE_3V3 PH0 +#endif +#ifndef DISCHARGE_3V3 + #define DISCHARGE_3V3 PH1 + #define DISABLE_DISCHARGING HIGH + #define ENABLE_DISCHARGING LOW +#endif + +// Macro functions for 3V3 regulator management +#ifndef ENABLE_3V3_REGULATOR +# define ENABLE_3V3_REGULATOR() do { \ + digitalWrite(DISCHARGE_3V3, DISABLE_DISCHARGING); \ + digitalWrite(ENABLE_3V3, HIGH); \ + } while (0) +#endif +#ifndef DISABLE_3V3_REGULATOR +# define DISABLE_3V3_REGULATOR() do { \ + digitalWrite(ENABLE_3V3, LOW); \ + } while (0) +#endif +#ifndef DRAIN_3V3_REGULATOR_MS +# define DRAIN_3V3_REGULATOR_MS(ms) do { \ + if (digitalRead(ENABLE_3V3)) { break; } \ + digitalWrite(DISCHARGE_3V3, ENABLE_DISCHARGING); \ + delay(ms); \ + digitalWrite(DISCHARGE_3V3, DISABLE_DISCHARGING); \ + } while (0) +#endif + +// Dedicated board pins +#ifndef VMAIN_ADC + #define VMAIN_ADC PA4 + #define VMAIN_ADC_DIV_BOT_R 4.3f + #define VMAIN_ADC_DIV_TOP_R 10.0f + #define VMAIN_ADC_DIV_K ((double)((VMAIN_ADC_DIV_TOP_R + VMAIN_ADC_DIV_BOT_R) / VMAIN_ADC_DIV_BOT_R)) +#endif +#ifndef VMAIN_MV +# define VMAIN_MV() ({ \ + __HAL_ADC_CALC_DATA_TO_VOLTAGE(ADC1, __LL_ADC_CALC_VREFANALOG_VOLTAGE(ADC1, analogRead(AVREF), LL_ADC_GetResolution(ADC1)), analogRead(VMAIN_ADC), LL_ADC_GetResolution(ADC1)) * VMAIN_ADC_DIV_K; \ + }) +#endif +#ifndef CHARGE_DETECT + #define CHARGE_DETECT PA15 + #define CHARGING LOW + #define NOT_CHARGING HIGH +#endif +#ifndef USB_DETECT + #define USB_DETECT PB2 +#endif + +// SPI definitions +#ifndef PIN_SPI_SS + #define PIN_SPI_SS PB0 // Shared with D11 (no dedicated CS pin) +#endif +#ifndef PIN_SPI_SS1 + #define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 + #define PIN_SPI_SS2 PB0 +#endif +#ifndef PIN_SPI_SS3 + #define PIN_SPI_SS3 PNUM_NOT_DEFINED +#endif +#ifndef PIN_SPI_MOSI + #define PIN_SPI_MOSI PB5 +#endif +#ifndef PIN_SPI_MISO + #define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK + #define PIN_SPI_SCK PB3 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PB7 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PB6 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 1 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA10 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA9 +#endif + +// Default pin used for generic 'Serial3' instance +// Required for Virtual COM Port (VCP) +#ifndef PIN_SERIAL3_RX + #define PIN_SERIAL3_RX PA5 +#endif +#ifndef PIN_SERIAL3_TX + #define PIN_SERIAL3_TX PB10 +#endif + +// LPUART1 +#ifndef PIN_SERIAL_LP1_RX + #define PIN_SERIAL_LP1_RX PA3 +#endif +#ifndef PIN_SERIAL_LP1_TX + #define PIN_SERIAL_LP1_TX PA2 +#endif + +// Virtual COM Port for Heron with a 14-pin STLink Connector mounted. +// To use the STLINK's Virtual COM port, add the following line to an Arduino project: +// HardwareSerial SerialVCP(PIN_VCP_RX, PIN_VCP_TX); +#ifndef PIN_VCP_RX + #define PIN_VCP_RX PIN_SERIAL3_RX +#endif +#ifndef PIN_VCP_TX + #define PIN_VCP_TX PIN_SERIAL3_TX +#endif + +// Extra HAL modules +// #if !defined(HAL_DAC_MODULE_DISABLED) +// #define HAL_DAC_MODULE_ENABLED +// #endif +// #if !defined(HAL_OSPI_MODULE_DISABLED) +// #define HAL_OSPI_MODULE_ENABLED +// #endif +// #if !defined(HAL_SD_MODULE_DISABLED) +// #define HAL_SD_MODULE_ENABLED +// #endif + +// Alternate SYS_WKUP definition +#define PWR_WAKEUP_PIN1_1 +#define PWR_WAKEUP_PIN1_2 +#define PWR_WAKEUP_PIN2_1 +#define PWR_WAKEUP_PIN2_2 +#define PWR_WAKEUP_PIN3_1 +#define PWR_WAKEUP_PIN3_2 +#define PWR_WAKEUP_PIN4_1 +#define PWR_WAKEUP_PIN4_2 +#define PWR_WAKEUP_PIN5_1 +#define PWR_WAKEUP_PIN5_2 +#define PWR_WAKEUP_PIN6_1 +#define PWR_WAKEUP_PIN6_2 +#define PWR_WAKEUP_PIN7_1 +#define PWR_WAKEUP_PIN7_2 +#define PWR_WAKEUP_PIN8_1 + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #ifndef SERIAL_PORT_MONITOR + #define SERIAL_PORT_MONITOR Serial + #endif + #ifndef SERIAL_PORT_HARDWARE + #define SERIAL_PORT_HARDWARE Serial + #endif +#endif From fd487f6bac68ae79711ef106c2aa2dd026e6d5d6 Mon Sep 17 00:00:00 2001 From: "Zachary J. Fields" Date: Thu, 23 Apr 2026 13:21:18 -0500 Subject: [PATCH 2/5] fix: warm/cold boot low power behavior --- .../L433C(B-C)(T-U)_L443CC(T-U)/variant_CYGNET.cpp | 8 ++++++++ .../variant_SWAN_R5.cpp | 8 ++++++++ .../U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp | 13 +++++++++++++ 3 files changed, 29 insertions(+) diff --git a/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/variant_CYGNET.cpp b/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/variant_CYGNET.cpp index 51e717d209..a0e4dcc946 100644 --- a/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/variant_CYGNET.cpp +++ b/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/variant_CYGNET.cpp @@ -158,6 +158,14 @@ WEAK void SystemClock_Config(void) */ __HAL_RCC_PWR_CLK_ENABLE(); + /* DBGMCU->CR debug bits (DBG_SLEEP, DBG_STOP, DBG_STANDBY) survive NRST + * and are cleared only on VDD cycle. A prior SWD session can latch them, + * leaving the debug subsystem clocked in STOP/STANDBY on every subsequent + * warm reboot (hundreds of uA). Scrub them on every boot. + */ + CLEAR_BIT(DBGMCU->CR, + DBGMCU_CR_DBG_SLEEP | DBGMCU_CR_DBG_STOP | DBGMCU_CR_DBG_STANDBY); + /* Voltage scaling - Scale 1 required for SYSCLK = 80 MHz * RM0394 s.5.1.7: VOS2 supports up to 26 MHz only */ diff --git a/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/variant_SWAN_R5.cpp b/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/variant_SWAN_R5.cpp index f347ed4759..75d81f480f 100644 --- a/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/variant_SWAN_R5.cpp +++ b/variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/variant_SWAN_R5.cpp @@ -190,6 +190,14 @@ WEAK void SystemClock_Config(void) */ __HAL_RCC_PWR_CLK_ENABLE(); + /* DBGMCU->CR debug bits (DBG_SLEEP, DBG_STOP, DBG_STANDBY) survive NRST + * and are cleared only on VDD cycle. A prior SWD session can latch them, + * leaving the debug subsystem clocked in STOP/STANDBY on every subsequent + * warm reboot (hundreds of uA). Scrub them on every boot. + */ + CLEAR_BIT(DBGMCU->CR, + DBGMCU_CR_DBG_SLEEP | DBGMCU_CR_DBG_STOP | DBGMCU_CR_DBG_STANDBY); + /* Voltage scaling - Scale 1 Boost required for SYSCLK = 120 MHz * RM0432 s.5.1.8: "In Range 1 boost mode (R1MODE = 0), the maximum system * clock frequency is 120 MHz" diff --git a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp index 3ad9e35058..598c462476 100644 --- a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp +++ b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp @@ -206,6 +206,19 @@ WEAK void SystemClock_Config(void) */ __HAL_RCC_PWR_CLK_ENABLE(); + /** Clear DBGMCU low-power-mode latch bits + * + * ST-Link and IDEs set DBG_STOP and DBG_STANDBY on debugger attach to keep + * the SWD link alive across low-power mode entry. These bits survive NRST, + * watchdog, and software reset, and only clear on a true VDD cycle. If + * left set in the field, the debug subsystem stays clocked in STOP2 and + * adds hundreds of uA. + * + * On STM32U5 only DBG_STOP and DBG_STANDBY exist in DBGMCU->CR; there is + * no DBG_SLEEP bit on the Cortex-M33 debug architecture. + */ + CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP | DBGMCU_CR_DBG_STANDBY); + /** Select SMPS as the Vcore regulator * * The STM32U575OIY6QTR (Q-suffix) exposes the dedicated SMPS pinout, and From ec30d782bfeab4aa2ff54a3dc29c0d59ab824f3f Mon Sep 17 00:00:00 2001 From: "Zachary J. Fields" Date: Thu, 23 Apr 2026 14:52:32 -0500 Subject: [PATCH 3/5] fix: Add PWM back to pin D10 to Cygnet --- .../L433C(B-C)(T-U)_L443CC(T-U)/PeripheralPins_CYGNET.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/PeripheralPins_CYGNET.c b/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/PeripheralPins_CYGNET.c index cdf2173c08..d9c9ed64fa 100644 --- a/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/PeripheralPins_CYGNET.c +++ b/variants/STM32L4xx/L433C(B-C)(T-U)_L443CC(T-U)/PeripheralPins_CYGNET.c @@ -111,7 +111,7 @@ WEAK const PinMap PinMap_TIM[] = { {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 - D5 // {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 - LPUART1_VCP_RX // {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 - LPUART1_VCP_TX - // {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N - D10 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N - D10 // {PB_13_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N - D10 // {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N - D9 {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 - D9 From 45301c463a073b0472c8f88cc454377b8199c181 Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Fri, 24 Apr 2026 10:45:08 +0200 Subject: [PATCH 4/5] chore: clean up pins definition Signed-off-by: Frederic Pillon --- .../U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp | 66 +++++++++---------- .../U575O(G-I)YxQ_U585OIYxQ/variant_HERON.h | 52 +++++++-------- 2 files changed, 59 insertions(+), 59 deletions(-) diff --git a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp index 598c462476..c5ddbd4811 100644 --- a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp +++ b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp @@ -51,39 +51,39 @@ const PinName digitalPin[] = { PA_12, // 33 - USB_D_P PC_14, // 34 - OSC32_IN (LSE) PC_15, // 35 - OSC32_OUT (LSE) - PC_0, // 36 - D30/A11 - PC_1, // 37 - D31/A12 - PC_2, // 38 - D32/A13 - PC_3, // 39 - D33/A14 - PC_5, // 40 - D34/A15 - PC_6, // 41 - D35 - PC_7, // 42 - D36 - PC_8, // 43 - D37 - PC_9, // 44 - D38 - PC_10, // 45 - D39 - PC_11, // 46 - D40 - PC_12, // 47 - D41 - PD_0, // 48 - D45 - PD_1, // 49 - D46 - PD_2, // 50 - D47 - PD_4, // 51 - D48 - PD_5, // 52 - D49 - PD_14, // 53 - D50 - PD_15, // 54 - D51 - PE_3, // 55 - D52 - PE_4, // 56 - D53 - PE_5, // 57 - D54 - PE_6, // 58 - D55 - PE_7, // 59 - D56 - PE_8, // 60 - D57 - PE_9, // 61 - D58 - PE_10, // 62 - D59 - PG_9, // 63 - D60 - PG_10, // 64 - D61 - PG_11, // 65 - D62 - PG_12, // 66 - D63 - PG_13, // 67 - D64 - PG_14 // 68 - D65 + // PC_0, // 36 - D30/A11 + // PC_1, // 37 - D31/A12 + // PC_2, // 38 - D32/A13 + // PC_3, // 39 - D33/A14 + // PC_5, // 40 - D34/A15 + // PC_6, // 41 - D35 + // PC_7, // 42 - D36 + // PC_8, // 43 - D37 + // PC_9, // 44 - D38 + // PC_10, // 45 - D39 + // PC_11, // 46 - D40 + // PC_12, // 47 - D41 + // PD_0, // 48 - D45 + // PD_1, // 49 - D46 + // PD_2, // 50 - D47 + // PD_4, // 51 - D48 + // PD_5, // 52 - D49 + // PD_14, // 53 - D50 + // PD_15, // 54 - D51 + // PE_3, // 55 - D52 + // PE_4, // 56 - D53 + // PE_5, // 57 - D54 + // PE_6, // 58 - D55 + // PE_7, // 59 - D56 + // PE_8, // 60 - D57 + // PE_9, // 61 - D58 + // PE_10, // 62 - D59 + // PG_9, // 63 - D60 + // PG_10, // 64 - D61 + // PG_11, // 65 - D62 + // PG_12, // 66 - D63 + // PG_13, // 67 - D64 + // PG_14 // 68 - D65 }; // Analog (Ax) to digital pin number array diff --git a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.h b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.h index 27567103b8..b8fc1d5f75 100644 --- a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.h +++ b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.h @@ -27,32 +27,38 @@ #define PA1 PIN_A1 // A1/D1 #define PA2 PIN_A2 // A2/D2 #define PA3 PIN_A3 // A3/D3 -#define PA4 PIN_A8 // A8/BATTERY_VOLTAGE (STAT) -#define PA5 25 // USART3_VCP_RX -#define PA6 PIN_A6 // A6/MI -#define PA7 PIN_A5 // A5 +#define PB1 PIN_A4 // A4/D4 +#define PB8 5 // D5 +#define PB9 6 // D6 #define PA8 7 // LED_BUILTIN -#define PA9 19 // TX -#define PA10 18 // RX -#define PA11 32 // USB_D_N -#define PA12 33 // USB_D_P -#define PA13 23 // SWDIO -#define PA14 24 // SWCLK -#define PA15 29 // CHARGE_DETECT +#define PC13 8 // USER_BTN +#define PB14 9 // D9 +#define PB13 10 // D10 #define PB0 PIN_A7 // A7/D11 -#define PB1 PIN_A4 // A4/D4 -#define PB2 31 // USB_DETECT -#define PB3 15 // CK +#define PB15 12 // D12 #define PB4 13 // D13 +#define PA7 PIN_A5 // A5 +#define PB3 15 // CK #define PB5 16 // MO +#define PA6 PIN_A6 // A6/MI +#define PA10 18 // RX +#define PA9 19 // TX +#define PH3 20 // B #define PB6 21 // SCL #define PB7 22 // SDA -#define PB8 5 // D5 -#define PB9 6 // D6 +#define PA13 23 // SWDIO +#define PA14 24 // SWCLK +#define PA5 25 // USART3_VCP_RX #define PB10 26 // USART3_VCP_TX -#define PB13 10 // D10 -#define PB14 9 // D9 -#define PB15 12 // D12 +#define PH0 27 // ENABLE_3V3 +#define PH1 28 // DISCHARGE_3V3 +#define PA15 29 // CHARGE_DETECT +#define PA4 PIN_A8 // A8/BATTERY_VOLTAGE (STAT) +#define PB2 31 // USB_DETECT +#define PA11 32 // USB_D_N +#define PA12 33 // USB_D_P +#define PC14 34 // OSC32_IN (LSE) +#define PC15 35 // OSC32_OUT (LSE) // #define PC0 PIN_A11 // #define PC1 PIN_A12 // #define PC2 PIN_A13 @@ -65,9 +71,6 @@ // #define PC10 39 // #define PC11 40 // #define PC12 41 -#define PC13 8 // USER_BTN -#define PC14 34 // OSC32_IN (LSE) -#define PC15 35 // OSC32_OUT (LSE) // #define PD0 45 // #define PD1 46 // #define PD2 47 @@ -89,9 +92,6 @@ // #define PG12 63 // #define PG13 64 // #define PG14 65 -#define PH0 27 // ENABLE_3V3 -#define PH1 28 // DISCHARGE_3V3 -#define PH3 20 // B // Alternate pins number #define PA0_ALT1 (PA0 | ALT1) @@ -137,7 +137,7 @@ // #define PC10_ALT1 (PC10 | ALT1) // #define PC11_ALT1 (PC11 | ALT1) -#define NUM_DIGITAL_PINS 69 +#define NUM_DIGITAL_PINS 36 #define NUM_ANALOG_INPUTS 9 // On-board LED pin number From b8085ab2b479195fb90c364e46f5b384fde872d5 Mon Sep 17 00:00:00 2001 From: "Zachary J. Fields" Date: Fri, 24 Apr 2026 11:04:30 -0500 Subject: [PATCH 5/5] chore: Reorder pin defines Maintain consistency across all Blues board definitions --- .../PeripheralPins_HERON.c | 18 +++---- .../U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp | 18 +++---- .../U575O(G-I)YxQ_U585OIYxQ/variant_HERON.h | 50 +++++++++---------- 3 files changed, 43 insertions(+), 43 deletions(-) diff --git a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/PeripheralPins_HERON.c b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/PeripheralPins_HERON.c index 3c0008f834..6334f7eb96 100644 --- a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/PeripheralPins_HERON.c +++ b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/PeripheralPins_HERON.c @@ -38,8 +38,8 @@ WEAK const PinMap PinMap_ADC[] = { {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 8, 0)}, // ADC1_IN8 - A3/D3 {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 9, 0)}, // ADC1_IN9 - A8/BATTERY_VOLTAGE (STAT) {PA_4_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 9, 0)}, // ADC4_IN9 - A8/BATTERY_VOLTAGE (STAT) - // {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 10, 0)}, // ADC1_IN10 - USART3_VCP_RX - // {PA_5_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 10, 0)}, // ADC4_IN10 - USART3_VCP_RX + // {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 10, 0)}, // ADC1_IN10 - A9/USART3_VCP_RX + // {PA_5_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 10, 0)}, // ADC4_IN10 - A9/USART3_VCP_RX {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 11, 0)}, // ADC1_IN11 - A6/MI {PA_6_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 11, 0)}, // ADC4_IN11 - A6/MI {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 12, 0)}, // ADC1_IN12 - A5 @@ -48,7 +48,7 @@ WEAK const PinMap PinMap_ADC[] = { {PB_0_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 18, 0)}, // ADC4_IN18 - A7/D11 {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 16, 0)}, // ADC1_IN16 - A4/D4 {PB_1_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 19, 0)}, // ADC4_IN19 - A4/D4 - {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 17, 0)}, // ADC1_IN17 - USB_DETECT + {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 17, 0)}, // ADC1_IN17 - A10/USB_DETECT // {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 1, 0)}, // ADC1_IN1 // {PC_0_ALT1, ADC4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 1, 0)}, // ADC4_IN1 // {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 2, 0)}, // ADC1_IN2 @@ -68,7 +68,7 @@ WEAK const PinMap PinMap_ADC[] = { #ifdef HAL_DAC_MODULE_ENABLED WEAK const PinMap PinMap_DAC[] = { // {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 1, 0)}, // DAC1_OUT1 - A8/BATTERY_VOLTAGE (STAT) - // {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 2, 0)}, // DAC1_OUT2 - USART3_VCP_RX + // {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, LL_GPIO_PULL_NO, 0, 2, 0)}, // DAC1_OUT2 - A9/USART3_VCP_RX {NC, NP, 0} }; #endif @@ -121,8 +121,8 @@ WEAK const PinMap PinMap_TIM[] = { {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 - A3/D3 {PA_3_ALT1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 - A3/D3 {PA_3_ALT2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 - A3/D3 - // {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - USART3_VCP_RX - // {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N - USART3_VCP_RX + // {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - A9/USART3_VCP_RX + // {PA_5_ALT1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N - A9/USART3_VCP_RX {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - A6/MI {PA_6_ALT1, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 - A6/MI {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N - A5 @@ -140,7 +140,7 @@ WEAK const PinMap PinMap_TIM[] = { {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N - A4/D4 {PB_1_ALT1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 - A4/D4 {PB_1_ALT2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N - A4/D4 - {PB_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 4, 1)}, // TIM8_CH4N - USB_DETECT + {PB_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_TIM8, 4, 1)}, // TIM8_CH4N - A10/USB_DETECT {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 - CK {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - D13 {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - MO @@ -213,7 +213,7 @@ WEAK const PinMap PinMap_UART_RX[] = { {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_UART4)}, // A1/D1 {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF8_LPUART1)}, // A3/D3 {PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART2)}, // A3/D3 - {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // USART3_VCP_RX + {PA_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART3)}, // A9/USART3_VCP_RX {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // RX // {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_USART2)}, // CHARGE_DETECT {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF7_USART1)}, // SDA @@ -297,7 +297,7 @@ WEAK const PinMap PinMap_SPI_MISO[] = { #ifdef HAL_SPI_MODULE_ENABLED WEAK const PinMap PinMap_SPI_SCLK[] = { {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // A1/D1 - // {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // USART3_VCP_RX + // {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // A9/USART3_VCP_RX {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF3_SPI2)}, // TX {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF5_SPI1)}, // CK {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, LL_GPIO_PULL_UP, GPIO_AF6_SPI3)}, // CK diff --git a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp index c5ddbd4811..abc2a87b5a 100644 --- a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp +++ b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.cpp @@ -40,22 +40,22 @@ const PinName digitalPin[] = { PB_7, // 22 - SDA PA_13, // 23 - SWDIO PA_14, // 24 - SWCLK - PA_5, // 25 - USART3_VCP_RX + PA_5, // 25 - A9/USART3_VCP_RX PB_10, // 26 - USART3_VCP_TX PH_0, // 27 - ENABLE_3V3 PH_1, // 28 - DISCHARGE_3V3 PA_15, // 29 - CHARGE_DETECT PA_4, // 30 - A8/BATTERY_VOLTAGE (STAT) - PB_2, // 31 - USB_DETECT + PB_2, // 31 - A10/USB_DETECT PA_11, // 32 - USB_D_N PA_12, // 33 - USB_D_P PC_14, // 34 - OSC32_IN (LSE) PC_15, // 35 - OSC32_OUT (LSE) - // PC_0, // 36 - D30/A11 - // PC_1, // 37 - D31/A12 - // PC_2, // 38 - D32/A13 - // PC_3, // 39 - D33/A14 - // PC_5, // 40 - D34/A15 + // PC_0, // 36 - A11/D30 + // PC_1, // 37 - A12/D31 + // PC_2, // 38 - A13/D32 + // PC_3, // 39 - A14/D33 + // PC_5, // 40 - A15/D34 // PC_6, // 41 - D35 // PC_7, // 42 - D36 // PC_8, // 43 - D37 @@ -97,8 +97,8 @@ const uint32_t analogInputPin[] = { 17, // PA6, A6/MI 11, // PB0, A7/D11 30 // PA4, A8/BATTERY_VOLTAGE (STAT) - // 25, // PA5, USART3_VCP_RX - // 31, // PB2, USB_DETECT + // 25, // PA5, A9/USART3_VCP_RX + // 31, // PB2, A10/USB_DETECT // 36, // PC0, A11 // 37, // PC1, A12 // 38, // PC2, A13 diff --git a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.h b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.h index b8fc1d5f75..b470f76209 100644 --- a/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.h +++ b/variants/STM32U5xx/U575O(G-I)YxQ_U585OIYxQ/variant_HERON.h @@ -27,38 +27,32 @@ #define PA1 PIN_A1 // A1/D1 #define PA2 PIN_A2 // A2/D2 #define PA3 PIN_A3 // A3/D3 -#define PB1 PIN_A4 // A4/D4 -#define PB8 5 // D5 -#define PB9 6 // D6 +#define PA4 PIN_A8 // A8/BATTERY_VOLTAGE (STAT) +#define PA5 25 // A9/USART3_VCP_RX +#define PA6 PIN_A6 // A6/MI +#define PA7 PIN_A5 // A5 #define PA8 7 // LED_BUILTIN -#define PC13 8 // USER_BTN -#define PB14 9 // D9 -#define PB13 10 // D10 +#define PA9 19 // TX +#define PA10 18 // RX +#define PA11 32 // USB_D_N +#define PA12 33 // USB_D_P +#define PA13 23 // SWDIO +#define PA14 24 // SWCLK +#define PA15 29 // CHARGE_DETECT #define PB0 PIN_A7 // A7/D11 -#define PB15 12 // D12 -#define PB4 13 // D13 -#define PA7 PIN_A5 // A5 +#define PB1 PIN_A4 // A4/D4 +#define PB2 31 // A10/USB_DETECT #define PB3 15 // CK +#define PB4 13 // D13 #define PB5 16 // MO -#define PA6 PIN_A6 // A6/MI -#define PA10 18 // RX -#define PA9 19 // TX -#define PH3 20 // B #define PB6 21 // SCL #define PB7 22 // SDA -#define PA13 23 // SWDIO -#define PA14 24 // SWCLK -#define PA5 25 // USART3_VCP_RX +#define PB8 5 // D5 +#define PB9 6 // D6 #define PB10 26 // USART3_VCP_TX -#define PH0 27 // ENABLE_3V3 -#define PH1 28 // DISCHARGE_3V3 -#define PA15 29 // CHARGE_DETECT -#define PA4 PIN_A8 // A8/BATTERY_VOLTAGE (STAT) -#define PB2 31 // USB_DETECT -#define PA11 32 // USB_D_N -#define PA12 33 // USB_D_P -#define PC14 34 // OSC32_IN (LSE) -#define PC15 35 // OSC32_OUT (LSE) +#define PB13 10 // D10 +#define PB14 9 // D9 +#define PB15 12 // D12 // #define PC0 PIN_A11 // #define PC1 PIN_A12 // #define PC2 PIN_A13 @@ -71,6 +65,9 @@ // #define PC10 39 // #define PC11 40 // #define PC12 41 +#define PC13 8 // USER_BTN +#define PC14 34 // OSC32_IN (LSE) +#define PC15 35 // OSC32_OUT (LSE) // #define PD0 45 // #define PD1 46 // #define PD2 47 @@ -92,6 +89,9 @@ // #define PG12 63 // #define PG13 64 // #define PG14 65 +#define PH0 27 // ENABLE_3V3 +#define PH1 28 // DISCHARGE_3V3 +#define PH3 20 // B // Alternate pins number #define PA0_ALT1 (PA0 | ALT1)